Acumem SlowSpotter

Results: 17



#Item
1Computer architecture / Computing / Cache / CPU cache / Microprocessors / Memory hierarchy / Microarchitecture / Acumem SlowSpotter / Computer hardware / Central processing unit / Computer memory

Microsoft Word - A Novel Memory Metric and Measurement Methodology for Modern Memory System_TC 11.docx

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Source URL: www.cs.iit.edu

Language: English - Date: 2014-08-05 09:45:40
2Computer architecture / Cache / CPU cache / Computing / Computer data storage / CPUID / Acumem SlowSpotter / AMD 10h / Computer memory / Computer hardware / Central processing unit

F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide

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Source URL: eprint.iacr.org

Language: English - Date: 2014-07-04 21:30:09
3Computing / Computer architecture / Cache / CPU cache / Translation lookaside buffer / Alpha 21164 / Write buffer / Acumem SlowSpotter / R8000 / Computer hardware / Computer memory / Central processing unit

How to Improve Cache Performance? CS252 Graduate Computer Architecture Lecture 7

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Source URL: www.cs.berkeley.edu

Language: English - Date: 2003-06-11 14:31:47
4Computer architecture / Cache / CPU cache / Computing / Computer data storage / CPUID / Acumem SlowSpotter / AMD 10h / Computer memory / Computer hardware / Central processing unit

F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide

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Source URL: eprint.iacr.org

Language: English - Date: 2014-07-04 21:30:09
5Cache / CPU cache / Central processing unit / Computer memory / Bayesian network / Graphical model / Bayesian inference / Worst-case execution time / Acumem SlowSpotter / Statistics / Bayesian statistics / Statistical models

Probabilistic Instruction Cache Analysis using Bayesian Networks Mark Bartlett, Iain Bate, James Cussens and Dimitar Kazakov Department of Computer Science University of York York, UK

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Source URL: www.cs.york.ac.uk

Language: English - Date: 2012-05-02 15:17:12
6Computer hardware / Computer programming / CPU cache / Loop nest optimization / Cache / Memory hierarchy / Software pipelining / Lookup table / Acumem SlowSpotter / Computing / Computer memory / Compiler optimizations

Design and Evaluation of a Compiler Algorithm for Prefetching Todd C. Mowry, Monica S. Lam and Anoop Gupta Computer Systems Laboratory Stanford University, CA 94305

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Source URL: www-suif.stanford.edu

Language: English - Date: 2006-06-25 21:11:32
7Computer architecture / Prefetcher / CPU cache / AMD 10h / Memory hierarchy / Cache / NForce / Lookup table / Acumem SlowSpotter / Computer hardware / Computing / Computer memory

Sandbox Prefetching: Safe Run-Time Evaluation of Aggressive Prefetchers Seth H Pugsley1 , Zeshan Chishti2 , Chris Wilkerson2 , Peng-fei Chuang3 , Robert L Scott3 , Aamer Jaleel4 , Shih-Lien Lu2 , Kingsum Chow3 , and Raje

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Source URL: www.cs.utah.edu

Language: English - Date: 2014-01-10 15:51:59
8Computer architecture / Central processing unit / Cache / CPU cache / Lock / Multi-core processor / Acumem SlowSpotter / OpenMP / Computing / Threads / Parallel computing

Exploiting iterative-ness for parallel ML computations Henggang Cui, Alexey Tumanov, Jinliang Wei, Lianghong Xu, Wei Dai, Jesse Haber-Kucharsky, Qirong Ho, Gregory R. Ganger, Phillip B. Gibbons*, Garth A. Gibson, Eric P.

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Source URL: www.pdl.cmu.edu

Language: English - Date: 2014-10-14 11:38:22
9CPU cache / Dynamic random-access memory / Static random-access memory / Memory hierarchy / Random-access memory / Parallel computing / Locality of reference / Memory bandwidth / Acumem SlowSpotter / Computer memory / Computer hardware / Computing

Preprint of Chapter 24, pp. 699–722, in Parallel and Distributed Computing Handbook, Albert Y. Zomaya, editor. McGraw-Hill, [removed]Chapter X

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-03-28 18:19:23
10CPU cache / Dynamic random-access memory / Cache / Random-access memory / Memory bandwidth / Memory hierarchy / Acumem SlowSpotter / Computer memory / Computer hardware / Computing

Cache Performance in Vector Supercomputers L. I. Kontothanassisy R. A. Sugumarz G. J. Faanesz J. E. Smithx M. L. Scotty

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-03-27 20:19:05
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